Herbert Wertheim College of Engineering
Tehranipoor Lab
Led by Mark Tehranipoor · Electrical and Computer Engineering
What we study
The lab studies hardware security and trust, focusing on securing electronics and IoT devices. They develop tools and methods to integrate security into chip designs.
What working here is like
- Computational
- Building & testing
- Coding required
- Project
- 1
- Papers
- 5
Current projects
Automated Implementation of Secure Silicon (AISS)
A DARPA-funded project to develop tools for inexpensive, scalable on-chip security.
Summaries are written by AI in plain language from public symposium abstracts and may be imperfect.
Recent papers, explained
- IFV: Information Flow Verification at the Pre-silicon Stage Utilizing Static-Formal Methodology
2026
- A Survey on SoC Security Verification Methods at the Pre-silicon Stage
2026
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- Rethinking SoC Verification for Secure Cross-Layer Interactions
2025 · IEEE Design and Test
Examines how hardware and software layers interact in SoCs to identify security vulnerabilities.
- PSCMark: Power Side Channel-based Watermarking for SoC IPs Using Clock Gates
2025 · ACM Transactions on Design Automation of Electronic Systems
Uses power side-channel signals to watermark IP cores for authentication with minimal changes to the design.
- SAFET-HI: Secure Authentication-Based Framework for Encrypted Testing in Heterogeneous Integration
2025 · IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Creates a framework to securely test chiplets in systems by encrypting test data and authenticating chiplets.
Plain-language summaries are AI-written and reviewed by us; check the paper for details.
How to reach out
Mark Tehranipoor hasn't set up this page yet. Their UF Scholars profile lists their publications.